V 51
K 349782057500 umc_dti_sffqs11ux4
Y 0
D 0 0 2338 1653
Z 7
i 234
I 139 test:SHEET_A2 1 0 0 0 1 '
L 0 0 10 0 3 0 1 0 X1I139
I 102 test:OUTPUT 1 2160 1010 0 1 '
L 2190 1010 20 0 3 0 1 0 Q
C 104 1 9 0
I 106 test:DTI_GEN_TX 1 1590 980 0 1 '
A 1690 950 10 0 9 1 WNA=0.185
Q 14 5 0
A 1710 970 10 0 9 1 M=1
Q 14 5 0
A 1710 960 10 0 9 1 WPA=0.185
L 1590 980 10 0 3 0 1 0 X1I106
C 87 1 1 0
C 105 5 2 0
C 9 7 3 0
C 6 8 4 0
I 97 test:DTI_GEN_INV 1 2050 1160 4 1 '
A 1988 1228 10 4 9 1 WP=0.1
Q 14 5 0
A 1988 1218 10 4 9 1 WN=0.1
Q 14 5 0
L 2050 1160 10 0 3 0 1 0 X1I97
C 101 2 5 0
C 105 3 4 0
I 112 test:DTI_GEN_INV 1 1580 1370 3 1 '
A 1638 1308 10 3 9 1 WN=0.185
Q 14 5 0
A 1648 1308 10 3 9 1 WP=0.1
Q 14 5 0
L 1580 1370 10 0 3 0 1 0 X1I112
C 9 8 5 0
C 6 15 4 0
I 103 test:DTI_GEN_INV 1 1980 980 0 1 '
A 2042 1038 10 0 9 1 WN=0.185
Q 14 5 0
A 2042 1058 10 0 9 1 M=1
Q 14 5 0
A 2042 1048 10 0 9 1 WP=0.185
L 1980 980 10 0 3 0 1 0 X1I103
C 104 2 5 0
C 105 1 4 0
I 88 test:DTI_GEN_INV 1 1400 980 0 1 '
A 1462 1038 10 0 9 1 WN=0.185
Q 14 5 0
A 1462 1048 10 0 9 1 WP=0.185
Q 14 5 0
L 1400 980 10 0 3 0 1 0 X1I88
A 1470 1060 10 0 9 1 M=1
C 87 2 5 0
C 187 4 4 0
I 80 test:PMOS 1 1410 1190 4 1 '
A 1360 1275 15 4 9 1 W=0.1
Q 14 5 0
A 1360 1260 15 4 9 1 L=LPD
Q 14 5 0
L 1410 1190 10 0 3 0 1 0 M1I80
C 87 6 12 0
C 77 2 15 0
C 78 2 14 0
I 99 test:PMOS 1 1770 1050 0 1 '
A 1820 1135 15 0 9 1 W=0.1
Q 14 5 0
A 1820 1120 15 0 9 1 L=LPD
Q 14 5 0
L 1770 1050 10 0 3 0 1 0 M1I99
C 6 11 12 0
C 92 2 15 0
C 105 6 14 0
I 96 test:PMOS 1 1890 1150 4 1 '
A 1840 1235 15 4 9 1 W=0.1
Q 14 5 0
A 1840 1220 15 4 9 1 L=LPD
Q 14 5 0
L 1890 1150 10 0 3 0 1 0 M1I96
C 101 1 12 0
C 91 2 15 0
C 92 1 14 0
I 210 test:PMOS 1 1080 1160 0 1 '
A 1130 1230 15 0 9 1 L=LPD
Q 14 5 0
A 1130 1245 15 0 9 1 W=0.185
Q 14 5 0
L 1080 1160 10 0 3 0 1 0 M1I210
C 6 2 12 0
C 204 2 15 0
C 203 2 14 0
I 83 test:PMOS 1 1410 1090 4 1 '
A 1360 1175 15 4 9 1 W=0.1
Q 14 5 0
A 1360 1160 15 4 9 1 L=LPD
Q 14 5 0
L 1410 1090 10 0 3 0 1 0 M1I83
C 9 11 12 0
C 78 1 15 0
C 187 7 14 0
I 213 test:PMOS 1 1080 1060 0 1 '
A 1130 1145 15 0 9 1 W=0.185
Q 14 5 0
A 1130 1130 15 0 9 1 L=LPD
Q 14 5 0
L 1080 1060 10 0 3 0 1 0 M1I213
C 161 1 12 0
C 203 1 15 0
C 187 1 14 0
I 170 test:PMOS 1 600 1030 0 1 '
A 650 1115 15 0 9 1 W=0.185
Q 14 5 0
A 650 1100 15 0 9 1 L=LPD
Q 14 5 0
L 600 1030 10 0 3 0 1 0 M1I170
C 190 5 12 0
C 178 2 15 0
C 161 6 14 0
I 84 test:NMOS 1 1290 790 0 1 '
A 1340 860 15 0 9 1 L=LND
Q 14 5 0
A 1340 875 15 0 9 1 W=0.1
Q 14 5 0
L 1290 790 10 0 3 0 1 0 M1I84
C 6 5 12 0
C 79 2 17 0
C 187 5 16 0
I 81 test:NMOS 1 1410 690 4 1 '
A 1360 760 15 4 9 1 L=LND
Q 14 5 0
A 1360 775 15 4 9 1 W=0.1
Q 14 5 0
L 1410 690 10 0 3 0 1 0 M1I81
C 87 3 12 0
C 76 2 17 0
C 79 1 16 0
I 98 test:NMOS 1 1770 740 0 1 '
A 1820 810 15 0 9 1 L=LND
Q 14 5 0
A 1820 825 15 0 9 1 W=0.1
Q 14 5 0
L 1770 740 10 0 3 0 1 0 M1I98
C 9 5 12 0
C 94 2 17 0
C 105 2 16 0
I 95 test:NMOS 1 1890 640 4 1 '
A 1770 710 15 4 9 1 L=LND
Q 14 5 0
A 1770 725 15 4 9 1 W=0.1
Q 14 5 0
L 1890 640 10 0 3 0 1 0 M1I95
C 101 5 12 0
C 111 2 17 0
C 94 1 16 0
I 211 test:NMOS 1 1080 790 0 1 '
A 1130 860 15 0 9 1 L=LND
Q 14 5 0
A 1130 875 15 0 9 1 W=0.185
Q 14 5 0
L 1080 790 10 0 3 0 1 0 M1I211
C 9 1 12 0
C 205 2 17 0
C 206 2 16 0
I 212 test:NMOS 1 1080 890 0 1 '
A 1130 975 15 0 9 1 W=0.185
Q 14 5 0
A 1130 960 15 0 9 1 L=LND
Q 14 5 0
L 1080 890 10 0 3 0 1 0 M1I212
C 161 3 12 0
C 206 1 17 0
C 187 3 16 0
I 171 test:NMOS 1 600 910 0 1 '
A 650 980 15 0 9 1 L=LND
Q 14 5 0
A 650 995 15 0 9 1 W=0.185
Q 14 5 0
L 600 910 10 0 3 0 1 0 M1I171
C 190 6 12 0
C 173 2 17 0
C 161 8 16 0
I 208 test:VSS 1 1120 750 0 1 '
C 205 1 1 0
I 110 test:VSS 1 1810 600 0 1 '
C 111 1 1 0
I 82 test:VSS 1 1330 650 0 1 '
C 76 1 1 0
I 174 test:VSS 1 640 870 0 1 '
C 173 1 1 0
I 207 test:VDD 1 1120 1260 0 1 '
C 204 1 4 0
I 100 test:VDD 1 1810 1250 0 1 '
C 91 1 4 0
I 85 test:VDD 1 1330 1290 0 1 '
C 77 1 4 0
I 179 test:VDD 1 640 1130 0 1 '
C 178 1 4 0
I 169 test:INPUT 1 260 1020 0 1 '
L 220 1020 20 0 3 0 1 0 D
C 190 3 8 0
I 125 test:INPUT 1 260 1390 0 1 '
L 220 1390 20 0 3 0 1 0 CK
C 6 4 8 0
N 78
J 1350 1190 2
J 1350 1190 2
S 1 2
L 1350 1190 10 0 3 0 1 0 1N78
N 203
J 1140 1160 2
J 1140 1160 2
S 1 2
L 1140 1160 10 0 3 0 1 0 1N203
N 204
J 1140 1260 2
J 1140 1260 2
S 1 2
N 205
J 1140 790 2
J 1140 790 2
S 1 2
N 206
J 1140 890 2
J 1140 890 2
S 1 2
L 1140 890 10 0 3 0 1 0 1N206
N 178
J 660 1130 2
J 660 1130 2
S 2 1
N 111
J 1830 640 2
J 1830 640 2
S 1 2
N 91
J 1830 1250 2
J 1830 1250 2
S 1 2
N 92
J 1830 1150 2
J 1830 1150 2
S 1 2
L 1830 1150 10 0 3 0 1 0 1N92
N 94
J 1830 740 2
J 1830 740 2
S 2 1
L 1830 740 10 0 3 0 1 0 1N94
N 76
J 1350 690 2
J 1350 690 2
S 1 2
N 77
J 1350 1290 2
J 1350 1290 2
S 1 2
N 79
J 1350 790 2
J 1350 790 2
S 1 2
L 1350 790 10 0 3 0 1 0 1N79
N 190
J 560 960 3
J 560 1080 3
J 290 1030 2
J 560 1030 5
J 600 1080 2
J 600 960 2
S 1 6
S 2 5
S 3 4
S 1 4
S 4 2
N 104
J 2160 1020 2
J 2060 1020 2
S 2 1
N 9
J 1080 840 2
J 850 840 3
J 850 1360 3
J 1570 1360 3
J 1770 790 2
J 1570 790 5
J 1620 1070 2
J 1620 1290 2
J 1620 1140 5
J 1570 1140 5
J 1410 1140 2
S 3 4
S 6 4
S 6 5
S 6 10
S 9 8
L 1620 1280 10 3 3 0 1 0 CKB
S 10 9
S 11 10
S 7 9
S 2 3
S 2 1
N 187
J 1140 1060 2
J 1140 1020 5
J 1140 990 2
J 1400 1020 2
J 1350 890 2
J 1350 1020 5
J 1350 1090 2
S 6 7
S 5 6
S 6 4
S 3 2
S 2 1
S 2 6
L 1200 1020 10 0 3 0 1 0 ML
N 6
J 1060 1210 3
J 1080 1210 2
J 1060 1400 5
J 290 1400 2
J 1290 840 2
J 1250 840 3
J 1250 1400 5
J 1620 980 2
J 1620 940 3
J 1740 940 3
J 1770 1100 2
J 1740 1100 5
J 1740 1400 3
J 1620 1400 5
J 1620 1370 2
S 1 2
S 1 3
S 4 3
S 6 5
S 7 14
S 9 8
S 9 10
S 10 12
S 12 11
S 12 13
S 14 13
S 15 14
S 3 7
S 6 7
N 105
J 1980 1020 2
J 1830 840 2
J 2050 1200 2
J 2090 1200 3
J 1650 1020 2
J 1830 1050 2
J 1830 1020 5
J 1830 860 5
J 2090 860 3
S 2 8
S 3 4
S 7 6
S 8 7
S 9 4
S 8 9
S 5 7
L 1810 1020 10 0 3 0 1 0 XIDB
S 7 1
N 101
J 1890 1200 2
J 1970 1200 2
J 1940 1200 5
J 1940 690 3
J 1890 690 2
S 1 3
L 1900 1200 10 0 3 0 1 0 SL
S 3 2
S 4 3
S 5 4
N 161
J 1080 1110 2
J 1050 1110 3
J 1080 940 2
J 1050 940 3
J 1050 1020 5
J 660 1030 2
J 660 1020 5
J 660 1010 2
S 2 1
S 5 2
S 4 3
S 4 5
S 7 5
S 7 6
S 8 7
L 1065 1110 10 0 3 0 1 0 1N161
N 173
J 660 910 2
J 660 910 2
S 1 2
N 87
J 1590 1020 2
J 1480 1020 2
J 1410 740 2
J 1530 740 3
J 1530 1020 5
J 1410 1240 2
J 1530 1240 3
S 3 4
S 6 7
S 4 5
S 2 5
S 5 1
L 1535 1020 10 0 3 0 1 0 RM
S 5 7
l 2 1490 1070 1500 1420
T 1200 1440 10 0 3 Re-name node to RM for removal sim.
T 100 60 10 0 3 Hiep confirm latest Oct03rd_2021
E
